Automation and Tooling System Level Test

Job Description

Job DescriptionTitle : Automation and Tooling – System Level Test
Location: Palo Alto, CA

Note:
Look for profiles for Automation with post silicon bringup / validation experience.
System level for Google refers to Chip bringup environment & Integrated validation of test suite in post Si validation environment

Look for Automation of functional validation in post Si val environment.

Job Responsibilities:

• Participating in Silicon bring-up, hardware validation, and embedded software development.
• Develop, debug, and maintain firmware and board level control software.
• Interface with validation teams to automate test procedures and analyze behavior.
• Collaborate with silicon design and validation engineers to debug hardware and firmware issues.
• Support lab-based experiments, board bring-up, and system verification.
• Automate test cases and data collection using Python.

Minimum Qualification:

• Bachelor's or master's degree in electrical, Computer, or Electronics Engineering.
• 3-7 years of experience in embedded systems, firmware development, or hardware validation.
• 3 years of professional experience in developing, deploying, and maintaining robust test automation solutions (tools, frameworks and scripts)
• Proven experience in data processing and manipulation of large, complex test logs.
• Experience working with version control systems (e.g. git, perforce) in a collaboration team environment.
• Expert proficiency in at least one key scripting language used in test and data analysis (e.g. python).
• Solid understanding of software development principles, testing methodologies (e.g. regression, integration), and the full software development life cycle.
• Strong troubleshooting and analysis skills to identify, debug , and resolve issues in test script, automation infrastructure , and data.
• Excellent written and verbal communication skills to collaborate with cross- functional teams.
• Experience with microcontrollers, SoCs, and low-level interfaces (SPI, I2C, UART, GPIO, SWD).
• Experience with lab tools such as oscilloscopes, logic analyzers, JTAG debuggers.

Preferred Qualifications:

• Experience working specifically within a semiconductor, silicon validation, or high-volume manufacturing (HVM) environment.
• Direct experience with SLT hardware, software, or methodologies.
• Experience designing and building GUI/web-based dashboards for data visualization.
• Familiarity with CI/CD pipeline tools for deploying automation.
• Familiarity with low-level programming (C/C ) for interfacing with hardware or test routines.
• Knowledge of database technologies (e.g. SQL).
• Understanding of Statistical Analysis methods as applied to production yield data and quality control.
• Familiarity with high-end ATE/SLT test system architectures.
• Knowledge of embedded system, Linux/Android environments, or specific memory/interface protocols (e.g. DDR, UFS, MPHY).
• Experience with defect tracking, code and project management tools (e.g. git, JIRA).

Have a Great Day!
Warm Regards,
Mohit Mittal
Lead Recruiter
Contact Details: 609-629-2040
Email: mohit.mittal@applabsystems.com
4365 Route 1 South, Suite 105
Princeton, NJ 08540
www.applabsystems.com